1. Field of the Invention
The present invention relates to a semiconductor device that degrades the leak current of a dummy transistor.
2. Background Art
Recently, digital/analog hybrid devices have become more popular, and reducing the power consumption of ICs has become an important issue. And as the power supply voltage becomes lower, the use of transistors having lower threshold voltages is popularized.
However, if a high voltage is applied between the source and the drain of a transistor having a low threshold voltage, a leak current on the order of several microamperes occurs even if the transistor is turned off (even if the gate voltage is lowered). Such a leak current is a disadvantage of the transistors having low threshold voltages.
Furthermore, analog circuits have a problem that the circuit performances are degraded due to process variations. Typically, in order to suppress the degradation of the circuit performances due to process variations, transistors used in the circuit are provided with a dummy transistor.
However, if a high voltage is applied between the source and the drain of the dummy transistor, a leak current may flow via the dummy transistor, depending on the wire connection. Thus, a measure against the leak current has to be taken.
Conventionally, in order to suppress the leak current when the transistor is in the off state, a switch (a low-leak-current transistor having a high threshold voltage, for example) is connected to the ground (or the power supply) to block the leak current. In the case where a dummy transistor is added, the leak current can be suppressed by avoiding applying a high voltage between the source and the drain of the dummy transistor. However, in this case, a large parasitic capacitance occurs between the source/drain and the substrate, so that the gain and the noise figure (NF) at high frequencies are degraded.
The parasitic capacitance between the source/drain and the substrate can be degraded by making the potential of the source or drain of the dummy transistor that is not shared with the main transistor equal to the potential of the substrate with the gate.
However, even when the switch is in the off state, a leak current flows between the power supply and the ground via the dummy transistor if a potential difference occurs between the source and the drain of the main transistor.
As a result, there is a problem that the standby power requirement increases in the communication system, such as a cellular phone.
As the conventional semiconductor device described above, there has been proposed a switch circuit in which two field effect transistors of the same conductivity type that receive a control signal at the gates thereof are connected in series between one terminal and the other terminal of the switch circuit, a switch element controlled by the control signal is connected between the connection of the source of one of the transistors and the drain of the other transistor and point of a constant potential, and the potential of the source of the one transistor and the drain of the other transistor are fixed at the constant potential when the switch circuit is in the off state (see Japanese Patent Laid-Open Publication No. 2005-268895). In this way, the switch circuit, which uses a low-threshold voltage field effect transistor in order to degrade the on resistance, suppresses the leak current.
However, the patent literature described above does not refer to any dummy transistor for reducing degradation of the circuit performances due to process variations, and the conventional semiconductor device described therein is not intended to suppress the leak current of the dummy transistor.
As described above, the prior art has a problem that the leak current cannot be degraded while suppressing degradation in gain and noise figure at high frequencies of a dummy transistor that degrades the circuit performances due to process variations of a semiconductor device.